Hierarchy Entity |
Total Power(mW) |
Block Dynamic Power(mW) |
top |
654.472 |
654.472(653.463) |
top/DDR3_Memory_Interface_Top_inst/ |
457.443 |
457.443(457.443) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/ |
457.443 |
457.443(457.443) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/i4/ |
455.862 |
455.862(363.333) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/i4/ddr3_sync/ |
0.058 |
0.058(0.000) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/i4/u_ddr_phy_init/ |
0.583 |
0.583(0.000) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/i4/u_ddr_phy_wd/ |
362.692 |
362.692(362.685) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/i4/u_ddr_phy_wd/data_lane_gen[0].u_ddr3_phy_data_lane/ |
246.704 |
246.704(246.696) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/i4/u_ddr_phy_wd/data_lane_gen[0].u_ddr3_phy_data_lane/u_ddr3_phy_data_io/ |
115.655 |
115.655(0.000) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/i4/u_ddr_phy_wd/data_lane_gen[0].u_ddr3_phy_data_lane/u_in_fifo/ |
65.520 |
65.520(0.000) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/i4/u_ddr_phy_wd/data_lane_gen[0].u_ddr3_phy_data_lane/u_out_fifo/ |
65.521 |
65.521(0.000) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/i4/u_ddr_phy_wd/data_lane_gen[1].u_ddr3_phy_data_lane/ |
115.659 |
115.659(115.651) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/i4/u_ddr_phy_wd/data_lane_gen[1].u_ddr3_phy_data_lane/u_ddr3_phy_data_io/ |
115.651 |
115.651(0.000) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/i4/u_ddr_phy_wd/u_ddr3_phy_cmd_lane/ |
0.219 |
0.219(0.154) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/i4/u_ddr_phy_wd/u_ddr3_phy_cmd_lane/u_cmd_fifo/ |
0.154 |
0.154(0.000) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/i4/u_ddr_phy_wd/u_fifo_ctrl/ |
0.103 |
0.103(0.000) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/u_gwmc_top/ |
1.580 |
1.580(1.320) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/u_gwmc_top/gw_cmd0/ |
0.320 |
0.320(0.000) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/u_gwmc_top/gw_rd_data0/ |
0.195 |
0.195(0.000) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/u_gwmc_top/gw_wr_data0/ |
0.307 |
0.307(0.305) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/u_gwmc_top/gw_wr_data0/wr_fifo/ |
0.305 |
0.305(0.000) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/u_gwmc_top/gwmc_bank_ctrl/ |
0.376 |
0.376(0.000) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/u_gwmc_top/gwmc_rank_ctrl/ |
0.088 |
0.088(0.000) |
top/DDR3_Memory_Interface_Top_inst/gw3_top/u_gwmc_top/gwmc_timing_ctrl/ |
0.034 |
0.034(0.000) |
top/DVI_TX_Top_inst/ |
0.473 |
0.473(0.473) |
top/DVI_TX_Top_inst/rgb2dvi_inst/ |
0.473 |
0.473(0.473) |
top/DVI_TX_Top_inst/rgb2dvi_inst/TMDS8b10b_inst_b/ |
0.157 |
0.157(0.000) |
top/DVI_TX_Top_inst/rgb2dvi_inst/TMDS8b10b_inst_g/ |
0.159 |
0.159(0.000) |
top/DVI_TX_Top_inst/rgb2dvi_inst/TMDS8b10b_inst_r/ |
0.157 |
0.157(0.000) |
top/Video_Frame_Buffer_Top_inst/ |
116.746 |
116.746(116.746) |
top/Video_Frame_Buffer_Top_inst/vfb_ddr3_wrapper_inst/ |
116.746 |
116.746(116.746) |
top/Video_Frame_Buffer_Top_inst/vfb_ddr3_wrapper_inst/u0_dma_frame_buffer/ |
116.453 |
116.453(116.453) |
top/Video_Frame_Buffer_Top_inst/vfb_ddr3_wrapper_inst/u0_dma_frame_buffer/u_dma_frame_ctrl/ |
0.019 |
0.019(0.000) |
top/Video_Frame_Buffer_Top_inst/vfb_ddr3_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/ |
54.318 |
54.318(54.199) |
top/Video_Frame_Buffer_Top_inst/vfb_ddr3_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/fifo_read_inst/ |
54.153 |
54.153(0.000) |
top/Video_Frame_Buffer_Top_inst/vfb_ddr3_wrapper_inst/u0_dma_frame_buffer/u_dma_read_ctrl/u_dma_32b_16b/ |
0.046 |
0.046(0.000) |
top/Video_Frame_Buffer_Top_inst/vfb_ddr3_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/ |
62.116 |
62.116(62.023) |
top/Video_Frame_Buffer_Top_inst/vfb_ddr3_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/fifo_write_inst/ |
61.961 |
61.961(0.000) |
top/Video_Frame_Buffer_Top_inst/vfb_ddr3_wrapper_inst/u0_dma_frame_buffer/u_dma_write_ctrl/u_dma_16b_32b/ |
0.062 |
0.062(0.000) |
top/Video_Frame_Buffer_Top_inst/vfb_ddr3_wrapper_inst/u_dma_bus_arbiter/ |
0.293 |
0.293(0.000) |
top/cmos_8_16bit_m0/ |
0.021 |
0.021(0.000) |
top/cmos_pll_m0/ |
2.510 |
2.510(0.000) |
top/i2c_config_m0/ |
0.255 |
0.255(0.248) |
top/i2c_config_m0/i2c_master_top_m0/ |
0.248 |
0.248(0.082) |
top/i2c_config_m0/i2c_master_top_m0/byte_controller/ |
0.082 |
0.082(0.066) |
top/i2c_config_m0/i2c_master_top_m0/byte_controller/bit_controller/ |
0.066 |
0.066(0.000) |
top/mem_pll_m0/ |
41.658 |
41.658(0.000) |
top/u_MnistLutSimple/ |
0.414 |
0.414(0.414) |
top/u_MnistLutSimple/i_MnistLutSimple_sub1/ |
0.008 |
0.008(0.008) |
top/u_MnistLutSimple/i_MnistLutSimple_sub1/i_MnistLutSimple_sub1_base/ |
0.008 |
0.008(0.000) |
top/u_MnistLutSimple/i_MnistLutSimple_sub2/ |
0.201 |
0.201(0.201) |
top/u_MnistLutSimple/i_MnistLutSimple_sub2/i_MnistLutSimple_sub2_base/ |
0.201 |
0.201(0.000) |
top/u_MnistLutSimple/i_MnistLutSimple_sub5/ |
0.205 |
0.205(0.205) |
top/u_MnistLutSimple/i_MnistLutSimple_sub5/i_MnistLutSimple_sub5_base/ |
0.205 |
0.205(0.000) |
top/u_tmds_rpll/ |
33.891 |
33.891(0.000) |
top/vga_timing_m0/ |
0.052 |
0.052(0.000) |