PnR Messages
| Report Title | PnR Report |
| Design File | C:\Gowin\GW1N\KiwiNano1K\SV_241128_kiwi_nano_1K\add4bit\impl\gwsynthesis\add4bit.vg |
| Physical Constraints File | C:\Gowin\GW1N\KiwiNano1K\SV_241128_kiwi_nano_1K\add4bit\src\add4bit.cst |
| Timing Constraints File | C:\Gowin\GW1N\KiwiNano1K\SV_241128_kiwi_nano_1K\add4bit\src\add4bit.sdc |
| Tool Version | V1.9.10.03 (64-bit) |
| Part Number | GW1N-UV1P5QN48XFC7/I6 |
| Device | GW1N-1P5 |
| Device Version | C |
| Created Time | Mon Dec 16 16:47:27 2024 |
| Legal Announcement | Copyright (C)2014-2024 Gowin Semiconductor Corporation. All rights reserved. |
PnR Details
| Place & Route Process | Running placement: Placement Phase 0: CPU time = 0h 0m 0.007s, Elapsed time = 0h 0m 0.007s Placement Phase 1: CPU time = 0h 0m 0.03s, Elapsed time = 0h 0m 0.03s Placement Phase 2: CPU time = 0h 0m 0.004s, Elapsed time = 0h 0m 0.004s Placement Phase 3: CPU time = 0h 0m 0.358s, Elapsed time = 0h 0m 0.358s Total Placement: CPU time = 0h 0m 0.399s, Elapsed time = 0h 0m 0.399s Running routing: Routing Phase 0: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s Routing Phase 1: CPU time = 0h 0m 0.028s, Elapsed time = 0h 0m 0.028s Routing Phase 2: CPU time = 0h 0m 0.043s, Elapsed time = 0h 0m 0.043s Routing Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s Total Routing: CPU time = 0h 0m 0.071s, Elapsed time = 0h 0m 0.071s Generate output files: CPU time = 0h 0m 0.194s, Elapsed time = 0h 0m 0.194s |
| Total Time and Memory Usage | CPU time = 0h 0m 0.664s, Elapsed time = 0h 0m 0.664s, Peak memory usage = 231MB |
Resource
Resource Usage Summary:
| Resource | Usage | Utilization |
| Logic | 119/1584 | 8% |
|     --LUT,ALU,ROM16 | 119(93 LUT, 26 ALU, 0 ROM16) | - |
|     --SSRAM(RAM16) | 0 | - |
| Register | 40/1704 | 3% |
|     --Logic Register as Latch | 0/1584 | 0% |
|     --Logic Register as FF | 29/1584 | 2% |
|     --I/O Register as Latch | 0/120 | 0% |
|     --I/O Register as FF | 11/120 | 10% |
| I/O Port | 21/40 | 53% |
| I/O Buf | 21 | - |
|     --Input Buf | 9 | - |
|     --Output Buf | 12 | - |
|     --Inout Buf | 0 | - |
I/O Bank Usage Summary:
| I/O Bank | Usage | Utilization |
| bank 0 | 2/10 | 20% |
| bank 1 | 3/10 | 30% |
| bank 2 | 6/10 | 60% |
| bank 3 | 2/2 | 100% |
| bank 4 | 4/4 | 100% |
| bank 5 | 4/4 | 100% |
Clock Resource Usage Summary:
| Clock Resource | Usage | Utilization |
| PRIMARY | 2/8 | 25% |
| LW | 0/8 | 0% |
| GCLK_PIN | 4/6 | 67% |
Global Clock Signals:
| Signal | Global Clock | Location |
| clk_d | PRIMARY | LEFT |
| clk_160hz | PRIMARY | LEFT RIGHT |
Pinout by Port Name:
| Port Name | Diff Pair | Loc./Bank | Constraint | Dir. | Site | IO Type | Drive | Pull Mode | PCI Clamp | Hysteresis | Open Drain | Vref | Single Resistor | Diff Resistor | BankVccio |
| clk | - | 4/5 | Y | in | IOL6[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| a[0] | - | 7/4 | Y | in | IOL11[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| a[1] | - | 5/5 | Y | in | IOL6[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| a[2] | - | 3/5 | Y | in | IOL4[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| a[3] | - | 2/5 | Y | in | IOL4[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| b[0] | - | 11/3 | Y | in | IOL17[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| b[1] | - | 10/4 | Y | in | IOL12[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| b[2] | - | 9/4 | Y | in | IOL12[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| b[3] | - | 8/4 | Y | in | IOL11[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| seg[0] | - | 26/1 | Y | out | IOR17[B] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| seg[1] | - | 21/2 | Y | out | IOB9[B] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| seg[2] | - | 20/2 | Y | out | IOB9[A] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| seg[3] | - | 19/2 | Y | out | IOB7[B] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| seg[4] | - | 18/2 | Y | out | IOB7[A] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| seg[5] | - | 15/2 | Y | out | IOB2[B] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| seg[6] | - | 14/2 | Y | out | IOB2[A] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| seg[7] | - | 12/3 | Y | out | IOL17[B] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| dig[0] | - | 31/1 | Y | out | IOR13[B] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| dig[1] | - | 29/1 | Y | out | IOR15[A] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| dig[2] | - | 40/0 | Y | out | IOT15[B] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| dig[3] | - | 41/0 | Y | out | IOT15[A] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
All Package Pins:
| Loc./Bank | Signal | Dir. | Site | IO Type | Drive | Pull Mode | PCI Clamp | Hysteresis | Open Drain | Vref | Single Resistor | Diff Resistor | Bank Vccio |
| 48/0 | - | out | IOT7[A] | LVCMOS33 | 8 | NONE | NA | NA | OFF | NA | NA | NA | 3.3 |
| 47/0 | - | in | IOT7[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 45/0 | - | in | IOT9[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 44/0 | - | in | IOT9[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 43/0 | - | in | IOT14[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 42/0 | - | in | IOT14[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 41/0 | dig[3] | out | IOT15[A] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| 40/0 | dig[2] | out | IOT15[B] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| 38/0 | - | in | IOT18[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 37/0 | - | in | IOT18[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 14/2 | seg[6] | out | IOB2[A] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| 15/2 | seg[5] | out | IOB2[B] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| 16/2 | - | in | IOB5[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 17/2 | - | in | IOB5[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 18/2 | seg[4] | out | IOB7[A] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| 19/2 | seg[3] | out | IOB7[B] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| 20/2 | seg[2] | out | IOB9[A] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| 21/2 | seg[1] | out | IOB9[B] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| 23/2 | - | in | IOB18[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 24/2 | - | in | IOB18[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 2/5 | a[3] | in | IOL4[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 3/5 | a[2] | in | IOL4[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 4/5 | clk | in | IOL6[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 5/5 | a[1] | in | IOL6[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 7/4 | a[0] | in | IOL11[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 8/4 | b[3] | in | IOL11[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 9/4 | b[2] | in | IOL12[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 10/4 | b[1] | in | IOL12[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 11/3 | b[0] | in | IOL17[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 12/3 | seg[7] | out | IOL17[B] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| 36/1 | - | in | IOR1[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 35/1 | - | in | IOR1[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 34/1 | - | in | IOR11[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 33/1 | - | in | IOR11[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 32/1 | - | in | IOR13[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 31/1 | dig[0] | out | IOR13[B] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| 29/1 | dig[1] | out | IOR15[A] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |
| 28/1 | - | in | IOR15[B] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 27/1 | - | in | IOR17[A] | LVCMOS33 | NA | UP | ON | NONE | NA | NA | NA | NA | 3.3 |
| 26/1 | seg[0] | out | IOR17[B] | LVCMOS33 | 8 | UP | NA | NA | OFF | NA | NA | NA | 3.3 |