Power Messages
| Report Title | Power Analysis Report |
| Design File | C:\Gowin\GW1N\KiwiNano1K\SV_241128_kiwi_nano_1K\leg4\impl\gwsynthesis\leg4.vg |
| Physical Constraints File | C:\Gowin\GW1N\KiwiNano1K\SV_241128_kiwi_nano_1K\leg4\src\leg4.cst |
| Timing Constraints File | C:\Gowin\GW1N\KiwiNano1K\SV_241128_kiwi_nano_1K\leg4\src\leg4.sdc |
| Tool Version | V1.9.10.03 (64-bit) |
| Part Number | GW1N-UV1P5QN48XFC7/I6 |
| Device | GW1N-1P5 |
| Device Version | C |
| Created Time | Mon Dec 16 17:40:17 2024 |
| Legal Announcement | Copyright (C)2014-2024 Gowin Semiconductor Corporation. All rights reserved. |
Configure Information:
| Grade | Commercial |
| Process | Typical |
| Ambient Temperature | 25.000 |
| Use Custom Theta JA | false |
| Heat Sink | None |
| Air Flow | LFM_0 |
| Use Custom Theta SA | false |
| Board Thermal Model | None |
| Use Custom Theta JB | false |
| Related Vcd File | |
| Related Saif File | |
| Filter Glitches | false |
| Default IO Toggle Rate | 0.125 |
| Default Remain Toggle Rate | 0.125 |
Power Summary
Power Information:
| Total Power (mW) | 53.856 |
| Quiescent Power (mW) | 53.583 |
| Dynamic Power (mW) | 0.273 |
Thermal Information:
| Junction Temperature | 27.414 |
| Theta JA | 37.300 |
| Max Allowed Ambient Temperature | 82.586 |
Supply Information:
| Voltage Source | Voltage | Dynamic Current(mA) | Quiescent Current(mA) | Power(mW) |
|---|---|---|---|---|
| VCC | 3.300 | 0.040 | 13.506 | 44.703 |
| VCCX | 3.300 | 0.021 | 1.500 | 5.020 |
| VCCIO33 | 3.300 | 0.021 | 1.231 | 4.132 |
Power Details
Power By Block Type:
| Block Type | Total Power(mW) | Static Power(mW) | Average Toggle Rate(millions of transitions/sec) |
|---|---|---|---|
| Logic | 0.059 | NA | 2.294 |
| IO | 5.930 | 5.719 | 1.013 |
Power By Hierarchy:
| Hierarchy Entity | Total Power(mW) | Block Dynamic Power(mW) |
|---|---|---|
| leg4sys | 0.059 | 0.059(0.059) |
| leg4sys/clkdiv_1/ | 0.009 | 0.009(0.000) |
| leg4sys/clkdiv_2/ | 0.015 | 0.015(0.000) |
| leg4sys/clkdiv_3/ | 0.015 | 0.015(0.000) |
| leg4sys/clkdiv_4/ | 0.009 | 0.009(0.000) |
| leg4sys/clkdiv_5/ | 0.011 | 0.011(0.000) |
| leg4sys/debounce_1/ | 0.000 | 0.000(0.000) |
| leg4sys/drv7seg_1/ | 0.000 | 0.000(0.000) |
| leg4sys/drv7seg_2/ | 0.000 | 0.000(0.000) |
| leg4sys/drv7seg_3/ | 0.000 | 0.000(0.000) |
| leg4sys/drv7seg_4/ | 0.000 | 0.000(0.000) |
| leg4sys/leg4_1/ | 0.000 | 0.000(0.000) |
| leg4sys/leg4_1/inst1/ | 0.000 | 0.000(0.000) |
| leg4sys/leg4_1/inst2/ | 0.000 | 0.000(0.000) |
| leg4sys/leg4_rom_1/ | 0.000 | 0.000(0.000) |
| leg4sys/mux7seg_1/ | 0.000 | 0.000(0.000) |
Power By Clock Domain:
| Clock Domain | Clock Frequency(Mhz) | Total Dynamic Power(mW) |
|---|---|---|
| clk27mhz | 27.000 | 0.062 |
| clk160hz | 0.000 | 0.000 |
| leg4_clk | 0.001 | 0.000 |
| clk400hz | 0.000 | 0.000 |
| clk1khz | 0.001 | 0.000 |
| clk10hz | 0.000 | 0.000 |
| clk1hz | 0.000 | 0.000 |