Power Messages
| Report Title | Power Analysis Report |
| Design File | C:\Gowin\GW1N\KiwiNano1K\SV_241128_kiwi_nano_1K\uart\impl\gwsynthesis\uart.vg |
| Physical Constraints File | C:\Gowin\GW1N\KiwiNano1K\SV_241128_kiwi_nano_1K\uart\src\uart.cst |
| Timing Constraints File | C:\Gowin\GW1N\KiwiNano1K\SV_241128_kiwi_nano_1K\uart\src\uart.sdc |
| Tool Version | V1.9.10.03 (64-bit) |
| Part Number | GW1N-UV1P5QN48XFC7/I6 |
| Device | GW1N-1P5 |
| Device Version | C |
| Created Time | Thu Dec 19 15:37:09 2024 |
| Legal Announcement | Copyright (C)2014-2024 Gowin Semiconductor Corporation. All rights reserved. |
Configure Information:
| Grade | Commercial |
| Process | Typical |
| Ambient Temperature | 25.000 |
| Use Custom Theta JA | false |
| Heat Sink | None |
| Air Flow | LFM_0 |
| Use Custom Theta SA | false |
| Board Thermal Model | None |
| Use Custom Theta JB | false |
| Related Vcd File | |
| Related Saif File | |
| Filter Glitches | false |
| Default IO Toggle Rate | 0.125 |
| Default Remain Toggle Rate | 0.125 |
Power Summary
Power Information:
| Total Power (mW) | 53.818 |
| Quiescent Power (mW) | 53.574 |
| Dynamic Power (mW) | 0.244 |
Thermal Information:
| Junction Temperature | 27.413 |
| Theta JA | 37.300 |
| Max Allowed Ambient Temperature | 82.587 |
Supply Information:
| Voltage Source | Voltage | Dynamic Current(mA) | Quiescent Current(mA) | Power(mW) |
|---|---|---|---|---|
| VCC | 3.300 | 0.031 | 13.506 | 44.673 |
| VCCX | 3.300 | 0.022 | 1.500 | 5.021 |
| VCCIO33 | 3.300 | 0.022 | 1.228 | 4.124 |
Power Details
Power By Block Type:
| Block Type | Total Power(mW) | Static Power(mW) | Average Toggle Rate(millions of transitions/sec) |
|---|---|---|---|
| Logic | 0.028 | NA | 1.541 |
| IO | 5.974 | 5.761 | 0.927 |
Power By Hierarchy:
| Hierarchy Entity | Total Power(mW) | Block Dynamic Power(mW) |
|---|---|---|
| test_uart | 0.028 | 0.028(0.028) |
| test_uart/clkdiv_1/ | 0.004 | 0.004(0.000) |
| test_uart/clkdiv_2/ | 0.003 | 0.003(0.000) |
| test_uart/clkdiv_3/ | 0.009 | 0.009(0.000) |
| test_uart/clkdiv_4/ | 0.011 | 0.011(0.000) |
| test_uart/debounce_1/ | 0.000 | 0.000(0.000) |
| test_uart/mux7seg_1/ | 0.000 | 0.000(0.000) |
| test_uart/rx_1/ | 0.000 | 0.000(0.000) |
| test_uart/tx_1/ | 0.000 | 0.000(0.000) |
Power By Clock Domain:
| Clock Domain | Clock Frequency(Mhz) | Total Dynamic Power(mW) |
|---|---|---|
| clk | 27.000 | 0.031 |
| clkbaudhz | 0.115 | 0.000 |
| clk400hz | 0.000 | 0.000 |
| clkbaudx2hz | 0.231 | 0.000 |
| NO CLOCK DOMAIN | 0.000 | 0.000 |
| clk160hz | 0.000 | 0.000 |