SoCとしてRZ/V2Lを搭載するシングル・ボード・コンピュータ（SBC）RZBoardと，そのSoCに内蔵された特徴的なプロセッサDRPを紹介します． In FPGAs, the one of elements in a circuit is gate level, while DRP has a coarse-grained building block. Therefore, the amount of configuration information is small, and it is easy to perform dynamic loading (application switching). The RZ/V2L has a Cortex-A55, Cortex-M33, and DRP. DRP can be offloaded image processing from the CPU.