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●トップソース

// ================================
// FILE NAME : dsi_tx_top.v
// DEPARTMENT : MACNICA Tecstar Company
// ================================
// DESCRIPTION : DSI Tx top source
// ================================
module dsi_tx_top (

input wire pixclk,
input wire resetn,
input wire [7:0] r_data_i,
input wire [7:0] g_data_i,
input wire [7:0] b_data_i,
input wire hsync_i,
input wire vsync_i,
input wire de_i,
inout wire clk_p_io,
inout wire clk_n_io,
inout wire [3:0] d_p_io,
inout wire [3:0] d_n_io
);

// ======================
// REG / WIRE DECLARATION
// ======================
wire [23:0] rgb_data;
wire byte_clk;
wire [31:0] byte_data;
wire byte_en;
wire hsync_start;
wire vsync_start;
wire [5:0] dt;
wire [15:0] wc;
wire c2d_ready;
wire hsync_start_dly;
wire vsync_start_dly;

// ======================
// PARAMETER DEFINITION
// ======================
parameter VC = 2'b00;
parameter DATATYPE = 6'h3E; // RGB888
parameter WORDCNT = 16'h1680; // 1920x3byte(RGB888) = 5760byte = 0x1680

// ======================
// FUNCTION DESCRIPTION
// ======================
assign gb_data = {r_data_i, g_data_i, b_data_i};

// ----------------------
// Pixel to Byte converter
// ----------------------
tx_pixel2byte
u_tx_pixel2byte (
.rst_n_i (resetn ),
.pix_clk_i (pixclk ),
.byte_clk_i (byte_clk ),
.vsync_i (vsync_i ),
.hsync_i (hsync_i ),
.de_i (de_i ),
.pix_data0_i (rgb_data ),
.c2d_ready_i (c2d_ready ),
.txfr_en_i (1'b1 ),
.vsync_start_o(vsync_start),
.vsync_end_o ( ),
.hsync_start_o(hsync_start),
.hsync_end_o ( ),
.txfr_req_o ( ),
.byte_en_o (byte_en ),
.byte_data_o (byte_data ),
.fifo_overflow_o( ),
.fifo_underflow_o( ),
.fifo_full_o ( ),
.fifo_empty_o ( )
) ;


// --------------------------------
// Data Type / Word Count Generator
// --------------------------------
dt_wc_gen
#(
.DATATYPE (DATATYPE ),
.WORDCNT (WORDCNT )
)
u_dt_wc_gen (byte_clk (byte_clk ),
.resetn (resetn ),
.de_i (de_i ),
.hsync_start_i (hsync_start ),
.vsync_start_i (vsync_start ),
.hsync_start_o (hsync_start_dly ),
.vsync_start_o (vsync_start_dly ),
.dt_o (dt ),
.wc_o (wc )
);

// --------------------------------
// MIPI DSI Transmitter
// --------------------------------
mipi_dsi_tx
u_mipi_dsi_tx (.ref_clk_i ( pixclk ),
.reset_n_i (resetn ),
.usrstdby_i (~resetn ),
.pd_dphy_i (~resetn ),
.byte_or_pkt_data_i (byte_data ),
.byte_or_pkt_data_en_i ( byte_en ),
.ready_o ( ),
.vc_i (VC ),
.dt_i (dt ),
.wc_i (wc ),
.clk_hs_en_i(1'b1 ),
.d_hs_en_i (c2d_ready ),
.d_hs_rdy_o ( ),
.byte_clk_o (byte_clk ),
.c2d_ready_o(c2d_ready ),
.clk_p_io (clk_p_io ),
.clk_n_io (clk_n_io ),
.d_p_io (d_p_io ),
.d_n_io (d_n_io ),
.vsync_start_i (vsync_start_dly ),
.hsync_start_i (hsync_start_dly ),
.lp_rx_en_i (1'b0 ), // Unuse LP signal command transmission
.lp_rx_data_p_o ( ), // Unuse LP signal command transmission
.lp_rx_data_n_o ( ) // Unuse LP signal command transmission
);

endmodule

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